Interface circuits are important for converting signals between systems that have different signal requirements (e.g., a first integrated circuit that has a first set of signal requirements and a second integrated circuit that has a second set of signal requirements). These interface circuits can be incorporated in the first IC as a last output stage, in the second IC as a first input stage, or as a stand-alone circuit that is interposed between the first IC and the second IC.
One trend in electronic systems is the reduction in the power supply voltage (e.g., Vcc). These systems that operate with lower power supply voltages are especially conducive for low-power consumption applications (e.g., portable electronic devices) since a lower power supply voltage leads to lower power consumption. However, as the supply voltage in systems is reduced, it becomes more of a challenge to meet certain electrical specifications. For example, certain requirements, such as voltage swing and common mode voltage, are increasing difficult to meet especially as the supply voltage for electronic systems decreases.
One example, of a specification with strict electrical requirements is the InfiniBand™ Architecture Specification. InfiniBand Trade Association publishes InfiniBand™ Architecture Specification Release 1.1, Vol. 1 and Vol. 2 (released Nov. 6, 2002) (see http://www.infinibandta.org/specs/register/publicspec/). This specification sets forth various parameters and requirements for the electrical, optical, mechanical specifications for use by designers of products and components that are compliant with the InfiniBand™ Architecture.
Specifically, as the power supply voltage decreases, there are certain design parameters that may become more difficult to meet. For example, one parameter related to the differential output is the common mode voltage (VCM). Commonly used CML drivers, which are described in greater detail hereinafter, have good power supply noise rejection, but usually have a higher output VCM, which is sometimes constrained by the electrical requirements or specifications of a system.
The InfiniBand Architecture Release 1.1, for example, specifies common mode voltage (VCM) with a maximum of 1.0V and a minimum of 0.5V. The common mode voltage (VCM) is determined by the expression: (Vhigh+V low)/2. Another parameter related to the differential output is the differential output (Vdiff). The InfiniBand Architecture Release 1.1, for example, specifies a Vdiff with a maximum of 1.6V and a minimum of 1.0V. The Vdiff is the peak-to-peak differential voltage with a 100 ohm differential load. On the other hand, voltage mode H-bridge drivers can have a relatively lower VCM, which is generally set by Vcc/2.
Many modern high speed communication systems require a single-ended output impedance of 50 ohms for the driver and the load differential impedance across the output nodes of 100 ohms. Under these conditions, the maximum differential output swing is limited or restricted to the voltage supply magnitude (Vcc) (that is, a single-ended swing of Vcc/2). It would be desirable to remove this voltage swing limitation or increase the voltage headroom with respect to the minimum voltage swing.
Interface circuits typically employ a wave-shaping or conditioning circuit to generate an output waveform to drive the next stage with signals that conform to the requirements of the next stage (e.g., a system compliant with the InfiniBand™ Architecture Specification). A driver circuit is typically designed for generating the drive waveform.
As can be appreciated, selecting a driver architecture is an important aspect of designing the wave shaping or conditioning circuit. Some of the different approaches to designing a driver circuit are now described.
There are two primary driver architectures. The first driver architecture is a current mode driver (also referred to as a CML driver). In CML drivers, current sources are defined, and the output swing is determined by a current proportional to the defined current source flowing through a load resistance.
The second driver architecture is a voltage mode driver. Unlike the CML driver, the voltage mode driver does not have current sources. Instead, the voltage mode driver determines the output swing by the switching behavior of transistors employed in the driver.
Between these two driver architectures, voltage mode drivers (see the following example) have a lower power consumption and a lower common mode voltage (VCM) as compared to current mode drivers when provided with the same operating voltage supply (Vcc) and output voltage swing (Vdiff). Power consumption is generally measures by the expression V*I, where V represents the power supply voltage (e.g., Vcc) and I represents the power supply current.
In this regard, the voltage mode driver architecture may be preferred to meet the requirements of some standards, such as InfiniBand Architecture.
One example of a voltage mode driver design is described in U.S. Pat. No. 6,445,530 entitled, “Class AB H-bridge using current sensing MOSFETs” (Inventor: John M. Baker). U.S. Pat. No. 6,445,530 is directed to the use of H-bridges to create different current flowing through an output load. Unfortunately, one disadvantage of this approach is that when applied to a modern high-speed communication systems with a 50-ohm output impedance and a 100-ohm differential load impedance, the maximum output swing is limited to the supply voltage as mentioned earlier, which can be a challenge when designing with strict requirements for power consumption and output high voltage.
Examples of driver architectures that employ a current mode logic (CML) are now described. One example of a CML driver is described in U.S. Pat. No. 6,437,599 entitled, “Programmable Line Driver” (Inventor: Eric Groen). This approach employs two differential pairs with programmable bias current to pre-emphasize the output signal.
A second example of a CML driver is described in U.S. Pat. No. 6,373,346, entitled, “Laser Driver pre-emphasis and de-emphasis method and/or architecture with tuning and duty cycle control” (Inventor: Kevine Wesley Kobayashi). This approach employs two additional control circuits of differential pairs to pre-distort the output signal generated by the main differential driver.
A third example of a CML driver is described in a paper entitled, “A 0.4-um CMOS 10 Gb/s 4-PAM Pre-emphasis Serial Link Transmitter,” by Farjad-Rad, Ramin; Yang, Chih-Kong Ken; Horowitz, Mark A.; Lee, Thomas H., IEEE Journal of Solid-State Circuits, Volume: 34, No. 5, May 1999, pages 580 to 585. This approach employs drivers in combination with FIR filters to generate a pre-emphasis signal. One disadvantage of this approach is that for certain applications (e.g., low common mode applications) where voltage headroom is needed, this type of driver is difficult to implement, especially with a low voltage supply and large voltage swing.
One significant drawback of the CML driver architecture is that the CML driver consumes more power than its voltage mode counterpart (i.e., a voltage mode driver architecture).
Another approach to driver design employs passive components for pre-emphasis. An example of this approach is described in a paper entitled, “Development of the high-band 8 mm video system,” by Tsuneki, K.; Ezaki, T.; Hirai, J.; Kubota, Y., IEEE Transactions on Consumer Electronics, Volume: 35, Issue 3, pages 436 to 441, August 1989. One disadvantage of this approach is that if this technique is utilized in the design of a driver integrated circuit (IC), excessively large capacitance will be required to provide sufficient bandwidth for high speed application. As can be appreciated, it may be difficult and problematic to integrate large capacitances in integrated circuits.
Another approach is driver design employs DAC controlled current sources to add/subtract with a main current source to generate a pre-emphasis signal. An example of this approach is described in a paper entitled, “A Low-Power 8-PAM Serial Transceiver in 0.5-um Digital CMOS,” by Foley, David J.; Flynn, Michael P., IEEE Journal of Solid-State Circuits, Volume: 37, No. 3, pages 310 to 316, March 2002. One disadvantage of this approach is that the design is tailored for single-ended output applications and not differential applications.
Based on the foregoing, there remains a need for a driver circuit for generating a drive waveform that overcomes the disadvantages set forth previously.